1. Field
Various features relate to multilayered printed circuit boards and more specifically to using embedded electro-optical passive elements to reduce electromagnetic interference, improve signal loss, and adjust, remove, or minimize frequency response notches at a frequency band of interest.
2. Background
High speed signal transmissions in printed circuit boards (PCBs) have an inherent impedance mismatch between the various components of the PCB, such as plated through holes or vias, signal traces and open propagation mediums. The impedance mismatches cause a significant impediment to obtaining lower loss and flat data transmission in high data rate (i.e. 8 to 25+ Giga bits per second) protocols such as Peripheral Component Interconnect Express (PCI-Ex), Gen 3, Institute of Electrical and Electronics Engineers (IEEE) 802.3ba, and Optical Interconnect Forum (OIF) Common Electrical Interface (CEI) 25G Long Reach (LR) standards. Some of these designs require high number of layers and a relatively thick PCB construction with long vias used to route signals between various layers in the PCB. These vias yield significant undesirable interference due to large electromagnetic reflections for the unused portion of an interconnection via back onto the signal line. Typically, to circumvent this undesirable interference, the unused stub of the via is back drilled up to near the signal layer.
FIG. 1 illustrates a via channel having an open-ended stub located within a PCB. The PCB 102 may include a plurality of non-conductive layers 104 (e.g., dielectric layers) with conductive layers 106 (e.g., reference/ground layers and/or signal layers) in between. Open-ended paired vias 108 and 110 may traverse the plurality of PCB layers. The open-ended paired vias may include a signal via 108 and a reference/ground via 110. The signal via 108 may be coupled to a first signal trace 103 (on a top side of the PCB 102) and a second signal trace on the signal layer 106. The reference/ground via 110 may be coupled to a reference/ground layer 107.
A via channel 100 comprises primarily a dielectric medium bounded by current carrying rails (via barrels 108 and 110). The via channel 100 is a region across the thickness of the PCB 102 that is made up primarily of the non-conductive layers (e.g., dielectric material) of the PCB 102 but also includes thin signal layers and/or conductive layers (e.g., typically thin or foil signal layers and/or conductive layers). The current carrying rails may include the signal via 108 and the reference/return via 110. A source current 120, 120′ and 120″ flowing through the signal via 108 and reference/return via 110 may provide a quasi-transverse electromagnetic (TEM) propagation mode for an electromagnetic wave, e.g. resulting from a source signal 105 (e.g., a high frequency signal, such as 5 GHz signal to 25 GHz or higher) flowing through the vias 108 and 110. The bulk of the signal energy propagates inside the dielectric medium (e.g., across the thickness of the PCB non-conductive, signal, and conductive layers between vias 108 and 110) and through gaps (antipads) isolating signal vias from ground/reference layers and other signal layers. While FIG. 1 illustrates a simplified case with one reference/ground via 110, other designs may also include a plurality of reference/ground vias.
One negative effect of the forward electromagnetic wave 112 is that it is reflected off of the open-ended via stub in an uncontrolled manner, including dissipation/propagation from the end point 116 of the signal via 108 and/or reflecting back into to PCB 102 that causes interference with the signal 105. For example, in a typical uncontrolled reflection, the total signal may be diminished up to 20 dB, for example, in a critical area of the 1st and 3rd harmonics. The transmission line dielectric medium (e.g., the via channel 100) and the conductive vias 108 and 110 may have significant losses in the multi-GHz frequency band, for example, and as a result it is not practical to use additional absorption and dissipation techniques as the additional loss uses too much of the signal noise budget.
FIG. 2 illustrates a typical S21 attenuation pattern 202 for a transmission line with an open ended plated through hole via. As shown, at the first and third harmonics for PCI Ex, Gen 3 and IEEE 802.3ba standards, significant interference notches 204 and 206 are present at critical frequencies (e.g., between 4.0 and 5.0 GHz, and between 12.0 and 15.0 GHz). The deep notch 204 near the first harmonic is primarily due to the open ended via stub reflections. A second deeper notch 206 is located in the region near the third harmonics with additional attenuation effects due to the higher dielectric and copper losses at these higher frequencies.
The current approach to circumvent this undesirable interference (e.g., notches at particular frequencies) is to back drill the vias. FIG. 3 illustrates the via channel of FIG. 1 where the vias have been back drilled within the PCB. However, this is an unsatisfactory solution.
FIG. 4 illustrates a S21 attenuation pattern 402 for a transmission line structure similar to FIG. 3 with the stubs of the paired via back drilled. Back drilling involves removing an unused part of a via by drilling it so that conductive plating is removed. Although via back drilling removes the notch (caused by the reflected electromagnetic wave) in the region of the first harmonics, it may also create a new and more harmful notch 304 near the region of the third harmonics. The placement of the notch 304 may depend, at least partially, on the PCB laminate electrical properties and physical PCB design attributes. The back drilled vias relocate the interference notch along the frequency axis into a critical region of the third harmonics. Although the back drilled vias have a positive effect of transmission bandwidth improvements at the lower frequencies because the unused via section is removed, the improvement is limited at higher frequencies, or may actually move the interference notch to a higher frequency.
Consequently, a more effective way of reducing undesirable interference notches due to the use of vias is needed. At present time there are two general approaches to solve this issue. A first approach includes the placement some terminating element on an opened end via (circuit) stub. A second approach includes using optic acrylic waveguides embedded in regular PCB structure to increase bandwidth and avoid back drilling the via. Both of these approaches method.
A first prior art approach is presented in U.S. Pat. Nos. 5,161,086, 6,593,535, and 7,457,132. In this approach, absorption and dissipation of an incident electromagnetic wave is achieved by using a terminating element. However, with increasing of data rates, losses in non-conductive layers (e.g., dielectric material) and conductive/signal layers of the PCB also increase drastically, significantly restricting the bandwidth and length of PCB transmission lines. Consequently, this approach is not practical to use additional absorption and dissipation techniques as the additional loss uses too much of the signal noise budget.
In a second prior art approach, acrylic waveguides may be embedded or included in the PCB, but this is relatively expensive and suffers from unresolved problem, such as the optical connection of the backplane, middle plane with daughter cards. Additionally, this approach requires electrical-to-optical and optical-to-conversion interfaces/couplers with thousands times frequency scaling. The relatively high cost of implementing this approach and energy consumption make this approach undesirable.
Consequently, there is a need for a solution that addresses the shortcomings of the prior art while improving signal propagation within via structures of a laminate-copper PCB.